1. Field of the Invention
The present invention relates generally to systems and methods for optimizing the processing of buffer data retirement conditions for data entries. More particularly, the present invention relates to systems and methods for processing at least a portion of the buffer data retirement conditions before the data entry is ready to be considered for retirement from the buffer, enabling faster and more efficient retirement of the data entry.
2. Related Art
Memory buffers—also referred to as queues—are often used in digital circuits. Memory buffers are temporary holding areas for data that is in transit from one device to another. Communicating devices often process data at different rates, and as a result, communication between these devices may be difficult and even impossible without intermediate buffers. If one device is ready to transmit data and the receiving device is not yet ready to receive the data, the data is stored temporarily in the buffer between the devices until the receiving device is ready to accept the data.
Memory buffers can facilitate communication between devices such as processors, RAM, hard disks, etc. Most keyboards have memory buffers for the temporary storage of keystrokes. Most printers have buffers for queuing the documents to be printed. Memory buffers can also be created for software programs by allocating a portion of the RAM of a computer system to act as a buffer to facilitate communication between a software program and the operating system, for example. Memory buffers can also exist between a software program and a device. A CD-writing program, for example, creates a memory buffer in RAM during the writing process to temporarily store data before writing the data to the CD.
Typically an entry is stored (registered) in the buffer and then removed (retired) if certain conditions are met. In very simple buffers—such as simple first-in-first-out queues (FIFOs)—data entries can be retired from the buffer after the data has been transmitted successfully to the receiving device. As digital circuits and devices become more complex, however, the number of conditions that must be met before a data entry can be retired from a buffer can significantly increase. For example, in complex multiprocessor systems, there can be ten or more conditions that must be met before a data entry can be retired from a processor's store or load queue.
To process the increasing number of retirement conditions, complex logic that is many levels deep is required. In addition, if it is determined by the logic that a data entry is to be retired, additional logic must generate multiple outputs whose purpose is to facilitate the retirement of the data. For example, the transferring of the data entry may require write requests to be made, pointers to be updated, counters to be incremented, etc. These additional requirements further increase the complexity of the logic.
It is typically desirable that a data entry retires from the queue with a certain frequency. It may be desirable, for example, to retire an entry every clock cycle. As the retirement logic, becomes more complex, however, the time required to determine whether a data entry is to be retired increases. The retirement logic can therefore become a bottleneck, particularly in high-clock-frequency, high-performance systems that require queue entries to be retired each clock cycle.
There is therefore a need for systems and methods that can increase the efficiency of determining whether a data entry is to be retired from a buffer. The systems and methods should be able to process the retirement conditions efficiently and within the required time (which may be one cycle, for example) so that the performance of high-speed systems is not necessarily affected.